Viability of GNS3 network simulation for testing features/configurations.

Fri Oct 18 10:28:11 UTC 2019

> From: Saku Ytti <saku at ytti.fi>
> Sent: Thursday, October 17, 2019 3:41 PM
> 
> On Thu, 17 Oct 2019 at 15:15, <adamv0025 at netconsultings.com> wrote:
> 
> > But as you can see A) and B) can easily be tested with a single DUT (or some
> small topology around it) using actual HW plugged in a loop with IXIA/Spirent
> testers.
> 
> Snake topology does conserve IXIA/Spirent ports but will not allow you to
> test everything. I see no practical way of just having bunch of IXIA/Spirent
> ports to verify behaviour under various types of congestion. Unfortunately
> the 'bunch' is getting rather large, since even the smallest atom of a modern
> networking chip may contain dozens of 100GE ports.
> 
More IXIA/Spirent ports is your answer we use the "dumb" IXIA cards for NPU/PFE and fabric fairness testing as those are much cheaper.

adam