Cogent Layer 2

James Jun james.jun at towardex.com
Wed Oct 14 19:12:00 UTC 2020


On Wed, Oct 14, 2020 at 10:54:49AM -0700, Ryan Hamel wrote:
> 
> One would think that with 100GE interfaces, it would not be possible to overrun the interface if we allowed full 10Gbps/flow, however most 100GE interfaces, at the chip level are broken down into 10Gbps lanes and the interfaces do not have a way to easily determine that a lane through the interface is at capacity, so as new flows enter the interface, they could get allocated to a lane that is already full and therefore experience packet loss.

This does raise an interesting point regarding ASR9K platform.  IIRC, older Typhoon/NP4c 100GE cards (e.g. Juggernaut A9K-2X100GE-TR) had problems where on a 100GE port, you can't sustain more than 10-12 Gbps per individual flow.  You had to hash to achieve aggregate bandwidth, which became a significant issue if you were trying to transport 10G L2 pseudowires with limited flow visibility.

I'm not aware that it is an issue any longer on newer Tomahawk/NP5c cards?

James


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