External BGP Controller for L3 Switch BGP routing

Saku Ytti saku at ytti.fi
Sat Jan 14 12:37:30 UTC 2017


On 14 January 2017 at 07:32, Jeremy Austin <jhaustin at gmail.com> wrote:

Hey,

> https://www.redpill-linpro.com/sysadvent/2016/12/09/slimming-routing-table.html


---
As described in a prevous post, we’re testing a HPE Altoline 6920 in
our lab. The Altoline 6920 is, like other switches based on the
Broadcom Trident II chipset, able to handle up to 720 Gbps of
throughput, packing 48x10GbE + 6x40GbE ports in a compact 1RU chassis.
Its price is in all likelihood a single-digit percentage of the price
of a traditional Internet router with a comparable throughput rating.
---

This makes it sound like small-FIB router is single-digit percentage
cost of full-FIB. Purely from BOM cost, high end XEON costs more than
say Jericho. If this does not match market realities, full-FIB being
expensive is fabricated problem.
I don't believe we're anywhere near of full-FIB being uneconomic. Of
course if you have solution where small-FIB gives very minor or no
compromises, it makes no sense to use full-FIB, as it has convergence
time cost too. But if you have to take compromises, I'd rather try to
fix the underlaying economic issue.
What is driving small-FIB boxes is not that full-FIB is inherently
very expensive, but rather that densest possible box is most
marketable to DC people, trading large FIB and deep buffers for higher
density is no-brainer in some DC applications.

I suspect most ports used are in DC, not in access, so market is not
focused on access requirements. For same cost, that you buy ghetto
cheap TridentII box, you should be able to buy slightly less dense
full-FIB and deep buffers box. In access networks this is fine,
because your port utilisation rate is poor anyhow.

Also having Trident in Internet facing interface may be suspect,
especially if you need to go from fast interface to slow or busy
interface, due to very minor packet buffers. This obviously won't be
much of a problem in inside-DC traffic.
This is quite hard to test in lab, you can't reasonable test it in
IXIA, the burst sizes it supports are too small, in Spirent you mostly
can see the problem.

-- 
  ++ytti



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