gigabit router (was Re: Getting a "portable" /19 or /20)
akyol at akyol.org
Wed Apr 11 03:59:49 UTC 2001
If your packets are memory mapped and you are using DMA, you don't
necessarily need to copy each packet into the main memory in an out, you can
look at the headers then ship the packet out. For lookups, one can use a
ternary CAM where you get 1 lookup per each memory access.
Nevertheless, there are much better alternatives to building a fast switch
or a router then using a general purpose CPU.
At the low end of the spectrum, quite a few companies supply network
processors with advanced lookup capabilities and at the high end, one can
always use ASICs, or FPGAs combined with CAMs.
> From: Craig Partridge <craig at aland.bbn.com>
> Date: Tue, 10 Apr 2001 19:35:35 -0400
> To: "Richard A. Steenbergen" <ras at e-gerbil.net>
> Cc: nanog at merit.edu
> Subject: gigabit router (was Re: Getting a "portable" /19 or /20)
> In message <Pine.BSF.4.21.0104101753540.98098-100000 at overlord.e-gerbil.net>,
> ichard A. Steenbergen" writes:
>> Don't be absurd, I can walk into fry's and pick up a motherboard with
>> 64bit/66mhz PCI, some Netgear GA620's, and all the other components for a
>> 1GHz computer for under $1000.
> OK, so your bus has 4.2 Gb/s of bandwidth. But, alas, you're in a PC
> so you have to copy each packet from the line card, into main memory,
> examine it, and push it back out to a line card. So each packet consumes
> twice its size in bus bandwidth. So 2 1 Gb/s line cards will consume
> 4 Gb/s backplane. Assuming you can run the PCI at full rate (which in
> my experience is a big big if), you can connect two Ethernets.
> Incidentally, this isn't the full story either. You have to do a route
> lookup on each of those packets. That's typically 5 to 10 memory
> accesses... 5 memory access times 1 Mpps per gigabit times 2 gigabits
> is 10 million lookups per second or 100 ns per lookup. Allowing for
> time spent getting through the chip to the pins, you probably need 60 or
> 70ns DRAM, which is doable. Except, oops!, that completely consumes
> your memory bandwidth... where are you going to find the cycles to
> get the packets in and out?
> PS: Side note, this illustrates where router vendors earn their bucks.
> Find a way to move data over each bus only once (double your bandwidth!).
> Design your memory subsystems to keep packets and routing data separate
> (increase your memory bandwidth!). Find a processor that doesn't waste
> cycles doing virtual memory (improve your memory access times!). Oh yes,
> and then add hot board swap, a working BGP implementation (quick, where's
> Tony Li working these days:-)), a CLI, and a power subsystem for a CO,
> and you're in business.
> Craig Partridge
> Chief Scientist
> BBN Technologies
More information about the NANOG