Vyatta as a BRAS

Wed Jul 14 07:24:49 UTC 2010

On Jul 14, 2010, at 1:34 PM, Mikael Abrahamsson wrote:

>  CRS-1 uses multicore processors (hundreds of cores) for forwarding on their linecards, and they achieve 40+ Mpps per linecard.

The CRS-1 makes use of the Metro subsystem for forwarding, with multiple Metros per Modular Service Card (MSC).  Each Metro complex (there are two per MSC) consists of the Metro chip itself, an NPU which contains 188 embedded RISC cores; two TCAM banks; SRAM; and FCRAM.

There's also a gatekeeper ASIC of some sort on the MSC which handles traffic incoming from the fabric, as well as another interface module ASIC on the Physical Layer Interface Module (PLIM).

I believe the CRS-3-specific MSCs each contain two QFAP complexes, which allow for 140gb/sec per linecard, and that there are various additional supporting ASICs on the MSCs and the PLIMs, as well.

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Roland Dobbins <rdobbins at arbor.net> // <http://www.arbornetworks.com>

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